Stencil overview#
entry_function_shell#
int entry_function_shell(){
volatile char stack_place_holder[128];
stack_place_holder[0] = 0;
result_int(0);
return 1;
}
arm64#
0000000000000000 <entry_function_shell>:
0: a9b77bfd stp x29, x30, [sp, #-144]!
4: 52800000 mov w0, #0x0 // #0
8: 910003fd mov x29, sp
c: 390043ff strb wzr, [sp, #16]
10: 94000000 bl 0 <result_int>
10: R_AARCH64_CALL26 result_int
14: 52800020 mov w0, #0x1 // #1
18: a8c97bfd ldp x29, x30, [sp], #144
1c: d65f03c0 ret
armv6#
00000000 <entry_function_shell>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3a00000 mov r0, #0
8: e24dd084 sub sp, sp, #132 @ 0x84
c: e5cd0000 strb r0, [sp]
10: ebfffffe bl 0 <result_int>
10: R_ARM_CALL result_int
14: e3a00001 mov r0, #1
18: e28dd084 add sp, sp, #132 @ 0x84
1c: e49df004 pop {pc} @ (ldr pc, [sp], #4)
armv7#
00000000 <entry_function_shell>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3a00000 mov r0, #0
8: e24dd084 sub sp, sp, #132 @ 0x84
c: e5cd0000 strb r0, [sp]
10: ebfffffe bl 0 <result_int>
10: R_ARM_CALL result_int
14: e3a00001 mov r0, #1
18: e28dd084 add sp, sp, #132 @ 0x84
1c: e49df004 pop {pc} @ (ldr pc, [sp], #4)
x86_64#
0000000000000000 <entry_function_shell>:
0: 48 81 ec 88 00 00 00 sub $0x88,%rsp
7: 31 ff xor %edi,%edi
9: c6 04 24 00 movb $0x0,(%rsp)
d: e8 00 00 00 00 call 12 <entry_function_shell+0x12>
e: R_X86_64_PLT32 result_int-0x4
12: b8 01 00 00 00 mov $0x1,%eax
17: 48 81 c4 88 00 00 00 add $0x88,%rsp
1e: c3 ret
neg_int#
void neg_int(int arg1) {
result_int(-arg1);
}
arm64#
0000000000000000 <neg_int>:
0: 4b0003e0 neg w0, w0
4: 14000000 b 0 <result_int>
4: R_AARCH64_JUMP26 result_int
armv6#
00000000 <neg_int>:
0: e2600000 rsb r0, r0, #0
4: eafffffe b 0 <result_int>
4: R_ARM_JUMP24 result_int
armv7#
00000000 <neg_int>:
0: e2600000 rsb r0, r0, #0
4: eafffffe b 0 <result_int>
4: R_ARM_JUMP24 result_int
x86_64#
0000000000000000 <neg_int>:
0: f7 df neg %edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int-0x4
neg_float#
void neg_float(float arg1) {
result_float(-arg1);
}
arm64#
0000000000000000 <neg_float>:
0: 1e214000 fneg s0, s0
4: 14000000 b 0 <result_float>
4: R_AARCH64_JUMP26 result_float
armv6#
00000000 <neg_float>:
0: eeb10a40 vneg.f32 s0, s0
4: eafffffe b 0 <result_float>
4: R_ARM_JUMP24 result_float
armv7#
00000000 <neg_float>:
0: eeb10a40 vneg.f32 s0, s0
4: eafffffe b 0 <result_float>
4: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <neg_float>:
0: 0f 57 05 00 00 00 00 xorps 0x0(%rip),%xmm0 # 7 <neg_float+0x7>
3: R_X86_64_PC32 .LC4-0x4
7: e9 00 00 00 00 jmp c <.LC3>
8: R_X86_64_PLT32 result_float-0x4
sqrt_int#
void sqrt_int(int arg1) {
result_float(sqrtf((float)arg1));
}
arm64#
0000000000000000 <sqrt_int>:
0: 1e220000 scvtf s0, w0
4: 1e202008 fcmp s0, #0.0
8: 540000c5 b.pl 20 <sqrt_int+0x20> // b.nfrst
c: a9bf7bfd stp x29, x30, [sp, #-16]!
10: 910003fd mov x29, sp
14: 94000000 bl 0 <sqrt_int>
14: R_AARCH64_CALL26 sqrtf
18: a8c17bfd ldp x29, x30, [sp], #16
1c: 14000000 b 0 <result_float>
1c: R_AARCH64_JUMP26 result_float
20: 1e21c000 fsqrt s0, s0
24: 14000000 b 0 <result_float>
24: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sqrt_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef57a40 vcmp.f32 s15, #0.0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 4a000001 bmi 1c <sqrt_int+0x1c>
14: eeb10ae7 vsqrt.f32 s0, s15
18: eafffffe b 0 <result_float>
18: R_ARM_JUMP24 result_float
1c: e92d4010 push {r4, lr}
20: eeb00a67 vmov.f32 s0, s15
24: ebfffffe bl 0 <sqrt_int>
24: R_ARM_CALL sqrtf
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_float>
2c: R_ARM_JUMP24 result_float
armv7#
00000000 <sqrt_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef57a40 vcmp.f32 s15, #0.0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 4a000001 bmi 1c <sqrt_int+0x1c>
14: eeb10ae7 vsqrt.f32 s0, s15
18: eafffffe b 0 <result_float>
18: R_ARM_JUMP24 result_float
1c: e92d4010 push {r4, lr}
20: eeb00a67 vmov.f32 s0, s15
24: ebfffffe bl 0 <sqrt_int>
24: R_ARM_CALL sqrtf
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_float>
2c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <sqrt_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 66 0f ef c9 pxor %xmm1,%xmm1
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: 0f 2e c8 ucomiss %xmm0,%xmm1
f: 77 09 ja 1a <sqrt_int+0x1a>
11: f3 0f 51 c0 sqrtss %xmm0,%xmm0
15: e9 00 00 00 00 jmp 1a <sqrt_int+0x1a>
16: R_X86_64_PLT32 result_float-0x4
1a: 50 push %rax
1b: e8 00 00 00 00 call 20 <sqrt_int+0x20>
1c: R_X86_64_PLT32 sqrtf-0x4
20: 5a pop %rdx
21: e9 00 00 00 00 jmp 26 <.LC0+0x2>
22: R_X86_64_PLT32 result_float-0x4
sqrt_float#
void sqrt_float(float arg1) {
result_float(sqrtf((float)arg1));
}
arm64#
0000000000000000 <sqrt_float>:
0: 1e202008 fcmp s0, #0.0
4: 540000c5 b.pl 1c <sqrt_float+0x1c> // b.nfrst
8: a9bf7bfd stp x29, x30, [sp, #-16]!
c: 910003fd mov x29, sp
10: 94000000 bl 0 <sqrt_float>
10: R_AARCH64_CALL26 sqrtf
14: a8c17bfd ldp x29, x30, [sp], #16
18: 14000000 b 0 <result_float>
18: R_AARCH64_JUMP26 result_float
1c: 1e21c000 fsqrt s0, s0
20: 14000000 b 0 <result_float>
20: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sqrt_float>:
0: eeb50a40 vcmp.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 4a000002 bmi 18 <sqrt_float+0x18>
c: eef07a40 vmov.f32 s15, s0
10: eeb10ae7 vsqrt.f32 s0, s15
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
18: e92d4010 push {r4, lr}
1c: ebfffffe bl 0 <sqrt_float>
1c: R_ARM_CALL sqrtf
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float>
24: R_ARM_JUMP24 result_float
armv7#
00000000 <sqrt_float>:
0: eeb50a40 vcmp.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 4a000002 bmi 18 <sqrt_float+0x18>
c: eef07a40 vmov.f32 s15, s0
10: eeb10ae7 vsqrt.f32 s0, s15
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
18: e92d4010 push {r4, lr}
1c: ebfffffe bl 0 <sqrt_float>
1c: R_ARM_CALL sqrtf
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float>
24: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <sqrt_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 0f 2e c8 ucomiss %xmm0,%xmm1
7: 77 09 ja 12 <sqrt_float+0x12>
9: f3 0f 51 c0 sqrtss %xmm0,%xmm0
d: e9 00 00 00 00 jmp 12 <sqrt_float+0x12>
e: R_X86_64_PLT32 result_float-0x4
12: 50 push %rax
13: e8 00 00 00 00 call 18 <sqrt_float+0x18>
14: R_X86_64_PLT32 sqrtf-0x4
18: 5a pop %rdx
19: e9 00 00 00 00 jmp 1e <.LC1+0x2>
1a: R_X86_64_PLT32 result_float-0x4
exp_int#
void exp_int(int arg1) {
result_float(expf((float)arg1));
}
arm64#
0000000000000000 <exp_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <exp_int>
c: R_AARCH64_CALL26 expf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <exp_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <exp_int>
c: R_ARM_CALL expf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <exp_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <exp_int>
c: R_ARM_CALL expf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <exp_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <exp_int+0x11>
d: R_X86_64_PLT32 expf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
exp_float#
void exp_float(float arg1) {
result_float(expf((float)arg1));
}
arm64#
0000000000000000 <exp_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <exp_float>
8: R_AARCH64_CALL26 expf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <exp_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <exp_float>
4: R_ARM_CALL expf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <exp_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <exp_float>
4: R_ARM_CALL expf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <exp_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <exp_float+0x9>
5: R_X86_64_PLT32 expf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
log_int#
void log_int(int arg1) {
result_float(logf((float)arg1));
}
arm64#
0000000000000000 <log_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <log_int>
c: R_AARCH64_CALL26 logf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <log_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <log_int>
c: R_ARM_CALL logf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <log_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <log_int>
c: R_ARM_CALL logf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <log_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <log_int+0x11>
d: R_X86_64_PLT32 logf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
log_float#
void log_float(float arg1) {
result_float(logf((float)arg1));
}
arm64#
0000000000000000 <log_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <log_float>
8: R_AARCH64_CALL26 logf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <log_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <log_float>
4: R_ARM_CALL logf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <log_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <log_float>
4: R_ARM_CALL logf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <log_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <log_float+0x9>
5: R_X86_64_PLT32 logf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
sin_int#
void sin_int(int arg1) {
result_float(sinf((float)arg1));
}
arm64#
0000000000000000 <sin_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <sin_int>
c: R_AARCH64_CALL26 sinf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sin_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <sin_int>
c: R_ARM_CALL sinf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <sin_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <sin_int>
c: R_ARM_CALL sinf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <sin_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <sin_int+0x11>
d: R_X86_64_PLT32 sinf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
sin_float#
void sin_float(float arg1) {
result_float(sinf((float)arg1));
}
arm64#
0000000000000000 <sin_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <sin_float>
8: R_AARCH64_CALL26 sinf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <sin_float>
4: R_ARM_CALL sinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <sin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <sin_float>
4: R_ARM_CALL sinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <sin_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <sin_float+0x9>
5: R_X86_64_PLT32 sinf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
cos_int#
void cos_int(int arg1) {
result_float(cosf((float)arg1));
}
arm64#
0000000000000000 <cos_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <cos_int>
c: R_AARCH64_CALL26 cosf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <cos_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <cos_int>
c: R_ARM_CALL cosf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <cos_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <cos_int>
c: R_ARM_CALL cosf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <cos_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <cos_int+0x11>
d: R_X86_64_PLT32 cosf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
cos_float#
void cos_float(float arg1) {
result_float(cosf((float)arg1));
}
arm64#
0000000000000000 <cos_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <cos_float>
8: R_AARCH64_CALL26 cosf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <cos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <cos_float>
4: R_ARM_CALL cosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <cos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <cos_float>
4: R_ARM_CALL cosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <cos_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <cos_float+0x9>
5: R_X86_64_PLT32 cosf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
tan_int#
void tan_int(int arg1) {
result_float(tanf((float)arg1));
}
arm64#
0000000000000000 <tan_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <tan_int>
c: R_AARCH64_CALL26 tanf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <tan_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <tan_int>
c: R_ARM_CALL tanf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <tan_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <tan_int>
c: R_ARM_CALL tanf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <tan_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <tan_int+0x11>
d: R_X86_64_PLT32 tanf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
tan_float#
void tan_float(float arg1) {
result_float(tanf((float)arg1));
}
arm64#
0000000000000000 <tan_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <tan_float>
8: R_AARCH64_CALL26 tanf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <tan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tan_float>
4: R_ARM_CALL tanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <tan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tan_float>
4: R_ARM_CALL tanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <tan_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <tan_float+0x9>
5: R_X86_64_PLT32 tanf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
asin_int#
void asin_int(int arg1) {
result_float(asinf((float)arg1));
}
arm64#
0000000000000000 <asin_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <asin_int>
c: R_AARCH64_CALL26 asinf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <asin_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <asin_int>
c: R_ARM_CALL asinf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <asin_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <asin_int>
c: R_ARM_CALL asinf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <asin_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <asin_int+0x11>
d: R_X86_64_PLT32 asinf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
asin_float#
void asin_float(float arg1) {
result_float(asinf((float)arg1));
}
arm64#
0000000000000000 <asin_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <asin_float>
8: R_AARCH64_CALL26 asinf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <asin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <asin_float>
4: R_ARM_CALL asinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <asin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <asin_float>
4: R_ARM_CALL asinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <asin_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <asin_float+0x9>
5: R_X86_64_PLT32 asinf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
acos_int#
void acos_int(int arg1) {
result_float(acosf((float)arg1));
}
arm64#
0000000000000000 <acos_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <acos_int>
c: R_AARCH64_CALL26 acosf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <acos_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <acos_int>
c: R_ARM_CALL acosf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <acos_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <acos_int>
c: R_ARM_CALL acosf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <acos_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <acos_int+0x11>
d: R_X86_64_PLT32 acosf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
acos_float#
void acos_float(float arg1) {
result_float(acosf((float)arg1));
}
arm64#
0000000000000000 <acos_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <acos_float>
8: R_AARCH64_CALL26 acosf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <acos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <acos_float>
4: R_ARM_CALL acosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <acos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <acos_float>
4: R_ARM_CALL acosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <acos_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <acos_float+0x9>
5: R_X86_64_PLT32 acosf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
atan_int#
void atan_int(int arg1) {
result_float(atanf((float)arg1));
}
arm64#
0000000000000000 <atan_int>:
0: 1e220000 scvtf s0, w0
4: a9bf7bfd stp x29, x30, [sp, #-16]!
8: 910003fd mov x29, sp
c: 94000000 bl 0 <atan_int>
c: R_AARCH64_CALL26 atanf
10: a8c17bfd ldp x29, x30, [sp], #16
14: 14000000 b 0 <result_float>
14: R_AARCH64_JUMP26 result_float
armv6#
00000000 <atan_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <atan_int>
c: R_ARM_CALL atanf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
armv7#
00000000 <atan_int>:
0: ee000a10 vmov s0, r0
4: e92d4010 push {r4, lr}
8: eeb80ac0 vcvt.f32.s32 s0, s0
c: ebfffffe bl 0 <atan_int>
c: R_ARM_CALL atanf
10: e8bd4010 pop {r4, lr}
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <atan_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 48 83 ec 08 sub $0x8,%rsp
8: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
c: e8 00 00 00 00 call 11 <atan_int+0x11>
d: R_X86_64_PLT32 atanf-0x4
11: 48 83 c4 08 add $0x8,%rsp
15: e9 00 00 00 00 jmp 1a <.LC0+0x2>
16: R_X86_64_PLT32 result_float-0x4
atan_float#
void atan_float(float arg1) {
result_float(atanf((float)arg1));
}
arm64#
0000000000000000 <atan_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <atan_float>
8: R_AARCH64_CALL26 atanf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <atan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <atan_float>
4: R_ARM_CALL atanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <atan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <atan_float>
4: R_ARM_CALL atanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <atan_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <atan_float+0x9>
5: R_X86_64_PLT32 atanf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC2+0x2>
e: R_X86_64_PLT32 result_float-0x4
abs_float#
void abs_float(float arg1) {
result_float(fabsf((float)arg1));
}
arm64#
0000000000000000 <abs_float>:
0: 1e20c000 fabs s0, s0
4: 14000000 b 0 <result_float>
4: R_AARCH64_JUMP26 result_float
armv6#
00000000 <abs_float>:
0: eeb00ac0 vabs.f32 s0, s0
4: eafffffe b 0 <result_float>
4: R_ARM_JUMP24 result_float
armv7#
00000000 <abs_float>:
0: eeb00ac0 vabs.f32 s0, s0
4: eafffffe b 0 <result_float>
4: R_ARM_JUMP24 result_float
x86_64#
0000000000000000 <abs_float>:
0: 0f 54 05 00 00 00 00 andps 0x0(%rip),%xmm0 # 7 <abs_float+0x7>
3: R_X86_64_PC32 .LC6-0x4
7: e9 00 00 00 00 jmp c <.LC3>
8: R_X86_64_PLT32 result_float-0x4
abs_int#
void abs_int(int arg1) {
result_int(__builtin_abs(arg1));
}
arm64#
0000000000000000 <abs_int>:
0: 7100001f cmp w0, #0x0
4: 5a80a400 cneg w0, w0, lt // lt = tstop
8: 14000000 b 0 <result_int>
8: R_AARCH64_JUMP26 result_int
armv6#
00000000 <abs_int>:
0: e3500000 cmp r0, #0
4: b2600000 rsblt r0, r0, #0
8: eafffffe b 0 <result_int>
8: R_ARM_JUMP24 result_int
armv7#
00000000 <abs_int>:
0: e3500000 cmp r0, #0
4: b2600000 rsblt r0, r0, #0
8: eafffffe b 0 <result_int>
8: R_ARM_JUMP24 result_int
x86_64#
0000000000000000 <abs_int>:
0: 89 f8 mov %edi,%eax
2: f7 df neg %edi
4: 0f 48 f8 cmovs %eax,%edi
7: e9 00 00 00 00 jmp c <.LC3>
8: R_X86_64_PLT32 result_int-0x4
sign_int#
void sign_int(int arg1) {
result_int((arg1 > 0) - (arg1 < 0));
}
arm64#
0000000000000000 <sign_int>:
0: 7100001f cmp w0, #0x0
4: 1a9fd7e1 cset w1, gt
8: 4b407c20 sub w0, w1, w0, lsr #31
c: 14000000 b 0 <result_int>
c: R_AARCH64_JUMP26 result_int
armv6#
00000000 <sign_int>:
0: e3500000 cmp r0, #0
4: c3a03001 movgt r3, #1
8: d3a03000 movle r3, #0
c: e0430fa0 sub r0, r3, r0, lsr #31
10: eafffffe b 0 <result_int>
10: R_ARM_JUMP24 result_int
armv7#
00000000 <sign_int>:
0: e3500000 cmp r0, #0
4: c3a03001 movgt r3, #1
8: d3a03000 movle r3, #0
c: e0430fa0 sub r0, r3, r0, lsr #31
10: eafffffe b 0 <result_int>
10: R_ARM_JUMP24 result_int
x86_64#
0000000000000000 <sign_int>:
0: 31 c0 xor %eax,%eax
2: 85 ff test %edi,%edi
4: 0f 9f c0 setg %al
7: c1 ef 1f shr $0x1f,%edi
a: 29 f8 sub %edi,%eax
c: 89 c7 mov %eax,%edi
e: e9 00 00 00 00 jmp 13 <.LC2+0x3>
f: R_X86_64_PLT32 result_int-0x4
sign_float#
void sign_float(float arg1) {
result_int((arg1 > 0) - (arg1 < 0));
}
arm64#
0000000000000000 <sign_float>:
0: 1e202018 fcmpe s0, #0.0
4: 1a9fd7e1 cset w1, gt
8: 1a9f57e0 cset w0, mi // mi = first
c: 4b000020 sub w0, w1, w0
10: 14000000 b 0 <result_int>
10: R_AARCH64_JUMP26 result_int
armv6#
00000000 <sign_float>:
0: eeb50ac0 vcmpe.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: c3a00001 movgt r0, #1
c: d3a00000 movle r0, #0
10: 43a03001 movmi r3, #1
14: 53a03000 movpl r3, #0
18: e0400003 sub r0, r0, r3
1c: eafffffe b 0 <result_int>
1c: R_ARM_JUMP24 result_int
armv7#
00000000 <sign_float>:
0: eeb50ac0 vcmpe.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: c3a00001 movgt r0, #1
c: d3a00000 movle r0, #0
10: 43a03001 movmi r3, #1
14: 53a03000 movpl r3, #0
18: e0400003 sub r0, r0, r3
1c: eafffffe b 0 <result_int>
1c: R_ARM_JUMP24 result_int
x86_64#
0000000000000000 <sign_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 31 ff xor %edi,%edi
6: 0f 2f c1 comiss %xmm1,%xmm0
9: 40 0f 97 c7 seta %dil
d: 31 c0 xor %eax,%eax
f: 0f 2f c8 comiss %xmm0,%xmm1
12: 0f 97 c0 seta %al
15: 29 c7 sub %eax,%edi
17: e9 00 00 00 00 jmp 1c <.LC1>
18: R_X86_64_PLT32 result_int-0x4
atan2_int_int#
void atan2_int_int(int arg1, int arg2) {
result_float_int(atan2f((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <atan2_int_int>:
0: 1e220000 scvtf s0, w0
4: 1e220021 scvtf s1, w1
8: a9be7bfd stp x29, x30, [sp, #-32]!
c: 910003fd mov x29, sp
10: f9000bf3 str x19, [sp, #16]
14: 2a0103f3 mov w19, w1
18: 94000000 bl 0 <atan2_int_int>
18: R_AARCH64_CALL26 atan2f
1c: 2a1303e0 mov w0, w19
20: f9400bf3 ldr x19, [sp, #16]
24: a8c27bfd ldp x29, x30, [sp], #32
28: 14000000 b 0 <result_float_int>
28: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <atan2_int_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee000a10 vmov s0, r0
8: ee071a90 vmov s15, r1
c: e24dd00c sub sp, sp, #12
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef80ae7 vcvt.f32.s32 s1, s15
18: e58d1004 str r1, [sp, #4]
1c: ebfffffe bl 0 <atan2_int_int>
1c: R_ARM_CALL atan2f
20: e59d0004 ldr r0, [sp, #4]
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_int>
2c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <atan2_int_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee000a10 vmov s0, r0
8: ee071a90 vmov s15, r1
c: e24dd00c sub sp, sp, #12
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef80ae7 vcvt.f32.s32 s1, s15
18: e58d1004 str r1, [sp, #4]
1c: ebfffffe bl 0 <atan2_int_int>
1c: R_ARM_CALL atan2f
20: e59d0004 ldr r0, [sp, #4]
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_int>
2c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <atan2_int_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 66 0f ef c9 pxor %xmm1,%xmm1
8: 53 push %rbx
9: 89 f3 mov %esi,%ebx
b: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
f: f3 0f 2a ce cvtsi2ss %esi,%xmm1
13: e8 00 00 00 00 call 18 <atan2_int_int+0x18>
14: R_X86_64_PLT32 atan2f-0x4
18: 89 df mov %ebx,%edi
1a: 5b pop %rbx
1b: e9 00 00 00 00 jmp 20 <.LC0>
1c: R_X86_64_PLT32 result_float_int-0x4
atan2_int_float#
void atan2_int_float(int arg1, float arg2) {
result_float_float(atan2f((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <atan2_int_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204008 fmov s8, s0
10: 1e220000 scvtf s0, w0
14: 1e204101 fmov s1, s8
18: 94000000 bl 0 <atan2_int_float>
18: R_AARCH64_CALL26 atan2f
1c: 1e204101 fmov s1, s8
20: fd400be8 ldr d8, [sp, #16]
24: a8c27bfd ldp x29, x30, [sp], #32
28: 14000000 b 0 <result_float_float>
28: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <atan2_int_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a40 vmov.f32 s16, s0
c: ee000a10 vmov s0, r0
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef00a48 vmov.f32 s1, s16
18: ebfffffe bl 0 <atan2_int_float>
18: R_ARM_CALL atan2f
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
armv7#
00000000 <atan2_int_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a40 vmov.f32 s16, s0
c: ee000a10 vmov s0, r0
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef00a48 vmov.f32 s1, s16
18: ebfffffe bl 0 <atan2_int_float>
18: R_ARM_CALL atan2f
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <atan2_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: 48 83 ec 18 sub $0x18,%rsp
b: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
f: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
15: e8 00 00 00 00 call 1a <atan2_int_float+0x1a>
16: R_X86_64_PLT32 atan2f-0x4
1a: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
20: 48 83 c4 18 add $0x18,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_float_float-0x4
atan2_float_int#
void atan2_float_int(float arg1, int arg2) {
result_float_int(atan2f((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <atan2_float_int>:
0: 1e220001 scvtf s1, w0
4: a9be7bfd stp x29, x30, [sp, #-32]!
8: 910003fd mov x29, sp
c: f9000bf3 str x19, [sp, #16]
10: 2a0003f3 mov w19, w0
14: 94000000 bl 0 <atan2_float_int>
14: R_AARCH64_CALL26 atan2f
18: 2a1303e0 mov w0, w19
1c: f9400bf3 ldr x19, [sp, #16]
20: a8c27bfd ldp x29, x30, [sp], #32
24: 14000000 b 0 <result_float_int>
24: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <atan2_float_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee070a90 vmov s15, r0
8: e24dd00c sub sp, sp, #12
c: eef80ae7 vcvt.f32.s32 s1, s15
10: e58d0004 str r0, [sp, #4]
14: ebfffffe bl 0 <atan2_float_int>
14: R_ARM_CALL atan2f
18: e59d0004 ldr r0, [sp, #4]
1c: e28dd00c add sp, sp, #12
20: e49de004 pop {lr} @ (ldr lr, [sp], #4)
24: eafffffe b 0 <result_float_int>
24: R_ARM_JUMP24 result_float_int
armv7#
00000000 <atan2_float_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee070a90 vmov s15, r0
8: e24dd00c sub sp, sp, #12
c: eef80ae7 vcvt.f32.s32 s1, s15
10: e58d0004 str r0, [sp, #4]
14: ebfffffe bl 0 <atan2_float_int>
14: R_ARM_CALL atan2f
18: e59d0004 ldr r0, [sp, #4]
1c: e28dd00c add sp, sp, #12
20: e49de004 pop {lr} @ (ldr lr, [sp], #4)
24: eafffffe b 0 <result_float_int>
24: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <atan2_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 53 push %rbx
5: 89 fb mov %edi,%ebx
7: f3 0f 2a cf cvtsi2ss %edi,%xmm1
b: e8 00 00 00 00 call 10 <atan2_float_int+0x10>
c: R_X86_64_PLT32 atan2f-0x4
10: 89 df mov %ebx,%edi
12: 5b pop %rbx
13: e9 00 00 00 00 jmp 18 <.LC0>
14: R_X86_64_PLT32 result_float_int-0x4
atan2_float_float#
void atan2_float_float(float arg1, float arg2) {
result_float_float(atan2f((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <atan2_float_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204028 fmov s8, s1
10: 94000000 bl 0 <atan2_float_float>
10: R_AARCH64_CALL26 atan2f
14: 1e204101 fmov s1, s8
18: fd400be8 ldr d8, [sp, #16]
1c: a8c27bfd ldp x29, x30, [sp], #32
20: 14000000 b 0 <result_float_float>
20: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <atan2_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <atan2_float_float>
c: R_ARM_CALL atan2f
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <atan2_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <atan2_float_float>
c: R_ARM_CALL atan2f
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <atan2_float_float>:
0: 48 83 ec 18 sub $0x18,%rsp
4: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
a: e8 00 00 00 00 call f <atan2_float_float+0xf>
b: R_X86_64_PLT32 atan2f-0x4
f: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
15: 48 83 c4 18 add $0x18,%rsp
19: e9 00 00 00 00 jmp 1e <.LC1+0x2>
1a: R_X86_64_PLT32 result_float_float-0x4
pow_int_int#
void pow_int_int(int arg1, int arg2) {
result_float_int(powf((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <pow_int_int>:
0: 1e220000 scvtf s0, w0
4: 1e220021 scvtf s1, w1
8: a9be7bfd stp x29, x30, [sp, #-32]!
c: 910003fd mov x29, sp
10: f9000bf3 str x19, [sp, #16]
14: 2a0103f3 mov w19, w1
18: 94000000 bl 0 <pow_int_int>
18: R_AARCH64_CALL26 powf
1c: 2a1303e0 mov w0, w19
20: f9400bf3 ldr x19, [sp, #16]
24: a8c27bfd ldp x29, x30, [sp], #32
28: 14000000 b 0 <result_float_int>
28: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <pow_int_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee000a10 vmov s0, r0
8: ee071a90 vmov s15, r1
c: e24dd00c sub sp, sp, #12
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef80ae7 vcvt.f32.s32 s1, s15
18: e58d1004 str r1, [sp, #4]
1c: ebfffffe bl 0 <pow_int_int>
1c: R_ARM_CALL powf
20: e59d0004 ldr r0, [sp, #4]
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_int>
2c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <pow_int_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee000a10 vmov s0, r0
8: ee071a90 vmov s15, r1
c: e24dd00c sub sp, sp, #12
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef80ae7 vcvt.f32.s32 s1, s15
18: e58d1004 str r1, [sp, #4]
1c: ebfffffe bl 0 <pow_int_int>
1c: R_ARM_CALL powf
20: e59d0004 ldr r0, [sp, #4]
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_int>
2c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <pow_int_int>:
0: 66 0f ef c0 pxor %xmm0,%xmm0
4: 66 0f ef c9 pxor %xmm1,%xmm1
8: 53 push %rbx
9: 89 f3 mov %esi,%ebx
b: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
f: f3 0f 2a ce cvtsi2ss %esi,%xmm1
13: e8 00 00 00 00 call 18 <pow_int_int+0x18>
14: R_X86_64_PLT32 powf-0x4
18: 89 df mov %ebx,%edi
1a: 5b pop %rbx
1b: e9 00 00 00 00 jmp 20 <.LC0>
1c: R_X86_64_PLT32 result_float_int-0x4
pow_int_float#
void pow_int_float(int arg1, float arg2) {
result_float_float(powf((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <pow_int_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204008 fmov s8, s0
10: 1e220000 scvtf s0, w0
14: 1e204101 fmov s1, s8
18: 94000000 bl 0 <pow_int_float>
18: R_AARCH64_CALL26 powf
1c: 1e204101 fmov s1, s8
20: fd400be8 ldr d8, [sp, #16]
24: a8c27bfd ldp x29, x30, [sp], #32
28: 14000000 b 0 <result_float_float>
28: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <pow_int_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a40 vmov.f32 s16, s0
c: ee000a10 vmov s0, r0
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef00a48 vmov.f32 s1, s16
18: ebfffffe bl 0 <pow_int_float>
18: R_ARM_CALL powf
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
armv7#
00000000 <pow_int_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a40 vmov.f32 s16, s0
c: ee000a10 vmov s0, r0
10: eeb80ac0 vcvt.f32.s32 s0, s0
14: eef00a48 vmov.f32 s1, s16
18: ebfffffe bl 0 <pow_int_float>
18: R_ARM_CALL powf
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <pow_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: 48 83 ec 18 sub $0x18,%rsp
b: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
f: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
15: e8 00 00 00 00 call 1a <pow_int_float+0x1a>
16: R_X86_64_PLT32 powf-0x4
1a: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
20: 48 83 c4 18 add $0x18,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_float_float-0x4
pow_float_int#
void pow_float_int(float arg1, int arg2) {
result_float_int(powf((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <pow_float_int>:
0: 1e220001 scvtf s1, w0
4: a9be7bfd stp x29, x30, [sp, #-32]!
8: 910003fd mov x29, sp
c: f9000bf3 str x19, [sp, #16]
10: 2a0003f3 mov w19, w0
14: 94000000 bl 0 <pow_float_int>
14: R_AARCH64_CALL26 powf
18: 2a1303e0 mov w0, w19
1c: f9400bf3 ldr x19, [sp, #16]
20: a8c27bfd ldp x29, x30, [sp], #32
24: 14000000 b 0 <result_float_int>
24: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <pow_float_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee070a90 vmov s15, r0
8: e24dd00c sub sp, sp, #12
c: eef80ae7 vcvt.f32.s32 s1, s15
10: e58d0004 str r0, [sp, #4]
14: ebfffffe bl 0 <pow_float_int>
14: R_ARM_CALL powf
18: e59d0004 ldr r0, [sp, #4]
1c: e28dd00c add sp, sp, #12
20: e49de004 pop {lr} @ (ldr lr, [sp], #4)
24: eafffffe b 0 <result_float_int>
24: R_ARM_JUMP24 result_float_int
armv7#
00000000 <pow_float_int>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: ee070a90 vmov s15, r0
8: e24dd00c sub sp, sp, #12
c: eef80ae7 vcvt.f32.s32 s1, s15
10: e58d0004 str r0, [sp, #4]
14: ebfffffe bl 0 <pow_float_int>
14: R_ARM_CALL powf
18: e59d0004 ldr r0, [sp, #4]
1c: e28dd00c add sp, sp, #12
20: e49de004 pop {lr} @ (ldr lr, [sp], #4)
24: eafffffe b 0 <result_float_int>
24: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <pow_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 53 push %rbx
5: 89 fb mov %edi,%ebx
7: f3 0f 2a cf cvtsi2ss %edi,%xmm1
b: e8 00 00 00 00 call 10 <pow_float_int+0x10>
c: R_X86_64_PLT32 powf-0x4
10: 89 df mov %ebx,%edi
12: 5b pop %rbx
13: e9 00 00 00 00 jmp 18 <.LC0>
14: R_X86_64_PLT32 result_float_int-0x4
pow_float_float#
void pow_float_float(float arg1, float arg2) {
result_float_float(powf((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <pow_float_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204028 fmov s8, s1
10: 94000000 bl 0 <pow_float_float>
10: R_AARCH64_CALL26 powf
14: 1e204101 fmov s1, s8
18: fd400be8 ldr d8, [sp, #16]
1c: a8c27bfd ldp x29, x30, [sp], #32
20: 14000000 b 0 <result_float_float>
20: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <pow_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <pow_float_float>
c: R_ARM_CALL powf
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <pow_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <pow_float_float>
c: R_ARM_CALL powf
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <pow_float_float>:
0: 48 83 ec 18 sub $0x18,%rsp
4: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
a: e8 00 00 00 00 call f <pow_float_float+0xf>
b: R_X86_64_PLT32 powf-0x4
f: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
15: 48 83 c4 18 add $0x18,%rsp
19: e9 00 00 00 00 jmp 1e <.LC1+0x2>
1a: R_X86_64_PLT32 result_float_float-0x4
min_int_int#
void min_int_int(int a, int b) {
result_int_int(a < b ? a : b, b);
}
arm64#
0000000000000000 <min_int_int>:
0: 6b00003f cmp w1, w0
4: 1a80d020 csel w0, w1, w0, le
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <min_int_int>:
0: e1510000 cmp r1, r0
4: b1a00001 movlt r0, r1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
armv7#
00000000 <min_int_int>:
0: e1510000 cmp r1, r0
4: b1a00001 movlt r0, r1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <min_int_int>:
0: 39 fe cmp %edi,%esi
2: 0f 4e fe cmovle %esi,%edi
5: e9 00 00 00 00 jmp a <.LC1+0x2>
6: R_X86_64_PLT32 result_int_int-0x4
max_int_int#
void max_int_int(int a, int b) {
result_int_int(a > b ? a : b, b);
}
arm64#
0000000000000000 <max_int_int>:
0: 6b00003f cmp w1, w0
4: 1a80a020 csel w0, w1, w0, ge // ge = tcont
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <max_int_int>:
0: e1510000 cmp r1, r0
4: a1a00001 movge r0, r1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
armv7#
00000000 <max_int_int>:
0: e1510000 cmp r1, r0
4: a1a00001 movge r0, r1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <max_int_int>:
0: 39 fe cmp %edi,%esi
2: 0f 4d fe cmovge %esi,%edi
5: e9 00 00 00 00 jmp a <.LC1+0x2>
6: R_X86_64_PLT32 result_int_int-0x4
min_int_float#
void min_int_float(int a, float b) {
float _a = (float)a; float _b = (float)b;
result_float_float(_a < _b ? _a : _b, b);
}
arm64#
0000000000000000 <min_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e202050 fcmpe s2, s0
c: 1e204c40 fcsel s0, s2, s0, mi // mi = first
10: 14000000 b 0 <result_float_float>
10: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <min_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 4eb00a67 vmovmi.f32 s0, s15
18: eafffffe b 0 <result_float_float>
18: R_ARM_JUMP24 result_float_float
armv7#
00000000 <min_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 4eb00a67 vmovmi.f32 s0, s15
18: eafffffe b 0 <result_float_float>
18: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <min_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5d c1 minss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
max_int_float#
void max_int_float(int a, float b) {
float _a = (float)a; float _b = (float)b;
result_float_float(_a > _b ? _a : _b, b);
}
arm64#
0000000000000000 <max_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e202050 fcmpe s2, s0
c: 1e20cc40 fcsel s0, s2, s0, gt
10: 14000000 b 0 <result_float_float>
10: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <max_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: ceb00a67 vmovgt.f32 s0, s15
18: eafffffe b 0 <result_float_float>
18: R_ARM_JUMP24 result_float_float
armv7#
00000000 <max_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: ceb00a67 vmovgt.f32 s0, s15
18: eafffffe b 0 <result_float_float>
18: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <max_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5f c1 maxss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
min_float_int#
void min_float_int(float a, int b) {
float _a = (float)a; float _b = (float)b;
result_float_int(_a < _b ? _a : _b, b);
}
arm64#
0000000000000000 <min_float_int>:
0: 1e204001 fmov s1, s0
4: 1e220000 scvtf s0, w0
8: 1e202030 fcmpe s1, s0
c: 54000044 b.mi 14 <min_float_int+0x14> // b.first
10: 14000000 b 0 <result_float_int>
10: R_AARCH64_JUMP26 result_float_int
14: 1e204020 fmov s0, s1
18: 14000000 b 0 <result_float_int>
18: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <min_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eeb40ae7 vcmpe.f32 s0, s15
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 5eb00a67 vmovpl.f32 s0, s15
14: eafffffe b 0 <result_float_int>
14: R_ARM_JUMP24 result_float_int
armv7#
00000000 <min_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eeb40ae7 vcmpe.f32 s0, s15
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 5eb00a67 vmovpl.f32 s0, s15
14: eafffffe b 0 <result_float_int>
14: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <min_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5d c8 minss %xmm0,%xmm1
f: 0f 28 c1 movaps %xmm1,%xmm0
12: e9 00 00 00 00 jmp 17 <.LC8+0x3>
13: R_X86_64_PLT32 result_float_int-0x4
max_float_int#
void max_float_int(float a, int b) {
float _a = (float)a; float _b = (float)b;
result_float_int(_a > _b ? _a : _b, b);
}
arm64#
0000000000000000 <max_float_int>:
0: 1e204001 fmov s1, s0
4: 1e220000 scvtf s0, w0
8: 1e202030 fcmpe s1, s0
c: 5400004c b.gt 14 <max_float_int+0x14>
10: 14000000 b 0 <result_float_int>
10: R_AARCH64_JUMP26 result_float_int
14: 1e204020 fmov s0, s1
18: 14000000 b 0 <result_float_int>
18: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <max_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eeb40ae7 vcmpe.f32 s0, s15
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: deb00a67 vmovle.f32 s0, s15
14: eafffffe b 0 <result_float_int>
14: R_ARM_JUMP24 result_float_int
armv7#
00000000 <max_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eeb40ae7 vcmpe.f32 s0, s15
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: deb00a67 vmovle.f32 s0, s15
14: eafffffe b 0 <result_float_int>
14: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <max_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5f c8 maxss %xmm0,%xmm1
f: 0f 28 c1 movaps %xmm1,%xmm0
12: e9 00 00 00 00 jmp 17 <.LC8+0x3>
13: R_X86_64_PLT32 result_float_int-0x4
min_float_float#
void min_float_float(float a, float b) {
float _a = (float)a; float _b = (float)b;
result_float_float(_a < _b ? _a : _b, b);
}
arm64#
0000000000000000 <min_float_float>:
0: 1e212010 fcmpe s0, s1
4: 1e214c00 fcsel s0, s0, s1, mi // mi = first
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <min_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 5eb00a60 vmovpl.f32 s0, s1
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <min_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 5eb00a60 vmovpl.f32 s0, s1
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <min_float_float>:
0: f3 0f 5d c1 minss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
max_float_float#
void max_float_float(float a, float b) {
float _a = (float)a; float _b = (float)b;
result_float_float(_a > _b ? _a : _b, b);
}
arm64#
0000000000000000 <max_float_float>:
0: 1e212010 fcmpe s0, s1
4: 1e21cc00 fcsel s0, s0, s1, gt
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <max_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: deb00a60 vmovle.f32 s0, s1
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <max_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: deb00a60 vmovle.f32 s0, s1
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <max_float_float>:
0: f3 0f 5f c1 maxss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
add_int_int#
void add_int_int(int arg1, int arg2) {
result_int_int(arg1 + arg2, arg2);
}
arm64#
0000000000000000 <add_int_int>:
0: 0b010000 add w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <add_int_int>:
0: e0800001 add r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <add_int_int>:
0: e0800001 add r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <add_int_int>:
0: 01 f7 add %esi,%edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int_int-0x4
add_int_float#
void add_int_float(int arg1, float arg2) {
result_float_float(arg1 + arg2, arg2);
}
arm64#
0000000000000000 <add_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e202840 fadd s0, s2, s0
c: 14000000 b 0 <result_float_float>
c: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <add_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee370a80 vadd.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
armv7#
00000000 <add_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee370a80 vadd.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <add_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 58 c1 addss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
add_float_int#
void add_float_int(float arg1, int arg2) {
result_float_int(arg1 + arg2, arg2);
}
arm64#
0000000000000000 <add_float_int>:
0: 1e220001 scvtf s1, w0
4: 1e202820 fadd s0, s1, s0
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <add_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee370a80 vadd.f32 s0, s15, s0
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <add_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee370a80 vadd.f32 s0, s15, s0
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <add_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 58 c1 addss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_int-0x4
add_float_float#
void add_float_float(float arg1, float arg2) {
result_float_float(arg1 + arg2, arg2);
}
arm64#
0000000000000000 <add_float_float>:
0: 1e212800 fadd s0, s0, s1
4: 14000000 b 0 <result_float_float>
4: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <add_float_float>:
0: ee300a20 vadd.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
armv7#
00000000 <add_float_float>:
0: ee300a20 vadd.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <add_float_float>:
0: f3 0f 58 c1 addss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
sub_int_int#
void sub_int_int(int arg1, int arg2) {
result_int_int(arg1 - arg2, arg2);
}
arm64#
0000000000000000 <sub_int_int>:
0: 4b010000 sub w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <sub_int_int>:
0: e0400001 sub r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <sub_int_int>:
0: e0400001 sub r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <sub_int_int>:
0: 29 f7 sub %esi,%edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int_int-0x4
sub_int_float#
void sub_int_float(int arg1, float arg2) {
result_float_float(arg1 - arg2, arg2);
}
arm64#
0000000000000000 <sub_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e203840 fsub s0, s2, s0
c: 14000000 b 0 <result_float_float>
c: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <sub_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee370ac0 vsub.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
armv7#
00000000 <sub_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee370ac0 vsub.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <sub_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5c c1 subss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
sub_float_int#
void sub_float_int(float arg1, int arg2) {
result_float_int(arg1 - arg2, arg2);
}
arm64#
0000000000000000 <sub_float_int>:
0: 1e220001 scvtf s1, w0
4: 1e213800 fsub s0, s0, s1
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <sub_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee300a67 vsub.f32 s0, s0, s15
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <sub_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee300a67 vsub.f32 s0, s0, s15
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <sub_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: f3 0f 2a cf cvtsi2ss %edi,%xmm1
8: f3 0f 5c c1 subss %xmm1,%xmm0
c: e9 00 00 00 00 jmp 11 <.LC2+0x1>
d: R_X86_64_PLT32 result_float_int-0x4
sub_float_float#
void sub_float_float(float arg1, float arg2) {
result_float_float(arg1 - arg2, arg2);
}
arm64#
0000000000000000 <sub_float_float>:
0: 1e213800 fsub s0, s0, s1
4: 14000000 b 0 <result_float_float>
4: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <sub_float_float>:
0: ee300a60 vsub.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
armv7#
00000000 <sub_float_float>:
0: ee300a60 vsub.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <sub_float_float>:
0: f3 0f 5c c1 subss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
mul_int_int#
void mul_int_int(int arg1, int arg2) {
result_int_int(arg1 * arg2, arg2);
}
arm64#
0000000000000000 <mul_int_int>:
0: 1b017c00 mul w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <mul_int_int>:
0: e0000091 mul r0, r1, r0
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <mul_int_int>:
0: e0000091 mul r0, r1, r0
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <mul_int_int>:
0: 0f af fe imul %esi,%edi
3: e9 00 00 00 00 jmp 8 <.LC1>
4: R_X86_64_PLT32 result_int_int-0x4
mul_int_float#
void mul_int_float(int arg1, float arg2) {
result_float_float(arg1 * arg2, arg2);
}
arm64#
0000000000000000 <mul_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e200840 fmul s0, s2, s0
c: 14000000 b 0 <result_float_float>
c: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <mul_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee270a80 vmul.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
armv7#
00000000 <mul_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee270a80 vmul.f32 s0, s15, s0
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <mul_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 59 c1 mulss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
mul_float_int#
void mul_float_int(float arg1, int arg2) {
result_float_int(arg1 * arg2, arg2);
}
arm64#
0000000000000000 <mul_float_int>:
0: 1e220001 scvtf s1, w0
4: 1e200820 fmul s0, s1, s0
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <mul_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee270a80 vmul.f32 s0, s15, s0
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <mul_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee270a80 vmul.f32 s0, s15, s0
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <mul_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 59 c1 mulss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_int-0x4
mul_float_float#
void mul_float_float(float arg1, float arg2) {
result_float_float(arg1 * arg2, arg2);
}
arm64#
0000000000000000 <mul_float_float>:
0: 1e210800 fmul s0, s0, s1
4: 14000000 b 0 <result_float_float>
4: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <mul_float_float>:
0: ee200a20 vmul.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
armv7#
00000000 <mul_float_float>:
0: ee200a20 vmul.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <mul_float_float>:
0: f3 0f 59 c1 mulss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
div_int_int#
void div_int_int(int arg1, int arg2) {
result_float_int((float)arg1 / (float)arg2, arg2);
}
arm64#
0000000000000000 <div_int_int>:
0: 2a0003e2 mov w2, w0
4: 1e220020 scvtf s0, w1
8: 2a0103e0 mov w0, w1
c: 1e220041 scvtf s1, w2
10: 1e201820 fdiv s0, s1, s0
14: 14000000 b 0 <result_float_int>
14: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <div_int_int>:
0: ee070a90 vmov s15, r0
4: ee071a10 vmov s14, r1
8: e1a00001 mov r0, r1
c: eef87ae7 vcvt.f32.s32 s15, s15
10: eeb80ac7 vcvt.f32.s32 s0, s14
14: ee870a80 vdiv.f32 s0, s15, s0
18: eafffffe b 0 <result_float_int>
18: R_ARM_JUMP24 result_float_int
armv7#
00000000 <div_int_int>:
0: ee070a90 vmov s15, r0
4: ee071a10 vmov s14, r1
8: e1a00001 mov r0, r1
c: eef87ae7 vcvt.f32.s32 s15, s15
10: eeb80ac7 vcvt.f32.s32 s0, s14
14: ee870a80 vdiv.f32 s0, s15, s0
18: eafffffe b 0 <result_float_int>
18: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <div_int_int>:
0: 89 f8 mov %edi,%eax
2: 66 0f ef c0 pxor %xmm0,%xmm0
6: 66 0f ef c9 pxor %xmm1,%xmm1
a: 89 f7 mov %esi,%edi
c: f3 0f 2a c0 cvtsi2ss %eax,%xmm0
10: f3 0f 2a ce cvtsi2ss %esi,%xmm1
14: f3 0f 5e c1 divss %xmm1,%xmm0
18: e9 00 00 00 00 jmp 1d <.LC1+0x1>
19: R_X86_64_PLT32 result_float_int-0x4
div_int_float#
void div_int_float(int arg1, float arg2) {
result_float_float((float)arg1 / (float)arg2, arg2);
}
arm64#
0000000000000000 <div_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e201840 fdiv s0, s2, s0
c: 14000000 b 0 <result_float_float>
c: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <div_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee870aa0 vdiv.f32 s0, s15, s1
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
armv7#
00000000 <div_int_float>:
0: ee070a90 vmov s15, r0
4: eef00a40 vmov.f32 s1, s0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: ee870aa0 vdiv.f32 s0, s15, s1
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <div_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
b: f3 0f 5e c1 divss %xmm1,%xmm0
f: e9 00 00 00 00 jmp 14 <.LC8>
10: R_X86_64_PLT32 result_float_float-0x4
div_float_int#
void div_float_int(float arg1, int arg2) {
result_float_int((float)arg1 / (float)arg2, arg2);
}
arm64#
0000000000000000 <div_float_int>:
0: 1e220001 scvtf s1, w0
4: 1e211800 fdiv s0, s0, s1
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <div_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee800a27 vdiv.f32 s0, s0, s15
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <div_float_int>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: ee800a27 vdiv.f32 s0, s0, s15
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <div_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: f3 0f 2a cf cvtsi2ss %edi,%xmm1
8: f3 0f 5e c1 divss %xmm1,%xmm0
c: e9 00 00 00 00 jmp 11 <.LC2+0x1>
d: R_X86_64_PLT32 result_float_int-0x4
div_float_float#
void div_float_float(float arg1, float arg2) {
result_float_float((float)arg1 / (float)arg2, arg2);
}
arm64#
0000000000000000 <div_float_float>:
0: 1e211800 fdiv s0, s0, s1
4: 14000000 b 0 <result_float_float>
4: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <div_float_float>:
0: ee800a20 vdiv.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
armv7#
00000000 <div_float_float>:
0: ee800a20 vdiv.f32 s0, s0, s1
4: eafffffe b 0 <result_float_float>
4: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <div_float_float>:
0: f3 0f 5e c1 divss %xmm1,%xmm0
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_float_float-0x4
floordiv_int_int#
void floordiv_int_int(int a, int b) {
int result = a / b - ((a % b != 0) && ((a < 0) != (b < 0)));
result_int_int(result, b);
}
arm64#
0000000000000000 <floordiv_int_int>:
0: 1ac10c03 sdiv w3, w0, w1
4: 4a010004 eor w4, w0, w1
8: 1b018062 msub w2, w3, w1, w0
c: 4b447c60 sub w0, w3, w4, lsr #31
10: 7100005f cmp w2, #0x0
14: 1a831000 csel w0, w0, w3, ne // ne = any
18: 14000000 b 0 <result_int_int>
18: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <floordiv_int_int>:
0: e92d4070 push {r4, r5, r6, lr}
4: e1a05000 mov r5, r0
8: e1a04001 mov r4, r1
c: ebfffffe bl 128 <__aeabi_idivmod>
c: R_ARM_CALL __aeabi_idivmod
10: e3510000 cmp r1, #0
14: 10255004 eorne r5, r5, r4
18: e1a01004 mov r1, r4
1c: 10400fa5 subne r0, r0, r5, lsr #31
20: e8bd4070 pop {r4, r5, r6, lr}
24: eafffffe b 0 <result_int_int>
24: R_ARM_JUMP24 result_int_int
armv7#
00000000 <floordiv_int_int>:
0: e92d4070 push {r4, r5, r6, lr}
4: e1a05000 mov r5, r0
8: e1a04001 mov r4, r1
c: ebfffffe bl 128 <__aeabi_idivmod>
c: R_ARM_CALL __aeabi_idivmod
10: e3510000 cmp r1, #0
14: 10255004 eorne r5, r5, r4
18: e1a01004 mov r1, r4
1c: 10400fa5 subne r0, r0, r5, lsr #31
20: e8bd4070 pop {r4, r5, r6, lr}
24: eafffffe b 0 <result_int_int>
24: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <floordiv_int_int>:
0: 89 f8 mov %edi,%eax
2: 89 f9 mov %edi,%ecx
4: 99 cltd
5: f7 fe idiv %esi
7: 89 c7 mov %eax,%edi
9: 85 d2 test %edx,%edx
b: 74 07 je 14 <floordiv_int_int+0x14>
d: 31 f1 xor %esi,%ecx
f: c1 e9 1f shr $0x1f,%ecx
12: 29 cf sub %ecx,%edi
14: e9 00 00 00 00 jmp 19 <.LC0+0x1>
15: R_X86_64_PLT32 result_int_int-0x4
floordiv_int_float#
void floordiv_int_float(int a, float b) {
result_float_float(floorf((float)a / (float)b), b);
}
arm64#
0000000000000000 <floordiv_int_float>:
0: 1e220002 scvtf s2, w0
4: 1e204001 fmov s1, s0
8: 1e201840 fdiv s0, s2, s0
c: 1e254000 frintm s0, s0
10: 14000000 b 0 <result_float_float>
10: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <floordiv_int_float>:
0: e92d4010 push {r4, lr}
4: ee070a90 vmov s15, r0
8: ed2d8b02 vpush {d8}
c: eef87ae7 vcvt.f32.s32 s15, s15
10: eeb08a40 vmov.f32 s16, s0
14: ee870a88 vdiv.f32 s0, s15, s16
18: ebfffffe bl 0 <floordiv_int_float>
18: R_ARM_CALL floorf
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
armv7#
00000000 <floordiv_int_float>:
0: e92d4010 push {r4, lr}
4: ee070a90 vmov s15, r0
8: ed2d8b02 vpush {d8}
c: eef87ae7 vcvt.f32.s32 s15, s15
10: eeb08a40 vmov.f32 s16, s0
14: ee870a88 vdiv.f32 s0, s15, s16
18: ebfffffe bl 0 <floordiv_int_float>
18: R_ARM_CALL floorf
1c: eef00a48 vmov.f32 s1, s16
20: ecbd8b02 vpop {d8}
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_float>
28: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <floordiv_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: f3 0f 10 1d 00 00 00 movss 0x0(%rip),%xmm3 # f <floordiv_int_float+0xf>
e: 00
b: R_X86_64_PC32 .LC9-0x4
f: f3 0f 10 25 00 00 00 movss 0x0(%rip),%xmm4 # 17 <floordiv_int_float+0x17>
16: 00
13: R_X86_64_PC32 .LC7-0x4
17: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
1b: f3 0f 5e c1 divss %xmm1,%xmm0
1f: 0f 28 d0 movaps %xmm0,%xmm2
22: 0f 54 d3 andps %xmm3,%xmm2
25: 0f 2e e2 ucomiss %xmm2,%xmm4
28: 76 2c jbe 56 <floordiv_int_float+0x56>
2a: f3 0f 2c c0 cvttss2si %xmm0,%eax
2e: 66 0f ef d2 pxor %xmm2,%xmm2
32: f3 0f 10 2d 00 00 00 movss 0x0(%rip),%xmm5 # 3a <floordiv_int_float+0x3a>
39: 00
36: R_X86_64_PC32 .LC8-0x4
3a: 0f 55 d8 andnps %xmm0,%xmm3
3d: f3 0f 2a d0 cvtsi2ss %eax,%xmm2
41: 0f 28 e2 movaps %xmm2,%xmm4
44: f3 0f c2 e0 06 cmpnless %xmm0,%xmm4
49: 0f 54 e5 andps %xmm5,%xmm4
4c: f3 0f 5c d4 subss %xmm4,%xmm2
50: 0f 56 d3 orps %xmm3,%xmm2
53: 0f 28 c2 movaps %xmm2,%xmm0
56: e9 00 00 00 00 jmp 5b <.LC0+0x3>
57: R_X86_64_PLT32 result_float_float-0x4
floordiv_float_int#
void floordiv_float_int(float a, int b) {
result_float_int(floorf((float)a / (float)b), b);
}
arm64#
0000000000000000 <floordiv_float_int>:
0: 1e220001 scvtf s1, w0
4: 1e211800 fdiv s0, s0, s1
8: 1e254000 frintm s0, s0
c: 14000000 b 0 <result_float_int>
c: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <floordiv_float_int>:
0: ee070a90 vmov s15, r0
4: e52de004 push {lr} @ (str lr, [sp, #-4]!)
8: eef87ae7 vcvt.f32.s32 s15, s15
c: e24dd00c sub sp, sp, #12
10: e58d0004 str r0, [sp, #4]
14: ee800a27 vdiv.f32 s0, s0, s15
18: ebfffffe bl 0 <floordiv_float_int>
18: R_ARM_CALL floorf
1c: e59d0004 ldr r0, [sp, #4]
20: e28dd00c add sp, sp, #12
24: e49de004 pop {lr} @ (ldr lr, [sp], #4)
28: eafffffe b 0 <result_float_int>
28: R_ARM_JUMP24 result_float_int
armv7#
00000000 <floordiv_float_int>:
0: ee070a90 vmov s15, r0
4: e52de004 push {lr} @ (str lr, [sp, #-4]!)
8: eef87ae7 vcvt.f32.s32 s15, s15
c: e24dd00c sub sp, sp, #12
10: e58d0004 str r0, [sp, #4]
14: ee800a27 vdiv.f32 s0, s0, s15
18: ebfffffe bl 0 <floordiv_float_int>
18: R_ARM_CALL floorf
1c: e59d0004 ldr r0, [sp, #4]
20: e28dd00c add sp, sp, #12
24: e49de004 pop {lr} @ (ldr lr, [sp], #4)
28: eafffffe b 0 <result_float_int>
28: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <floordiv_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: f3 0f 10 15 00 00 00 movss 0x0(%rip),%xmm2 # c <floordiv_float_int+0xc>
b: 00
8: R_X86_64_PC32 .LC9-0x4
c: f3 0f 10 1d 00 00 00 movss 0x0(%rip),%xmm3 # 14 <floordiv_float_int+0x14>
13: 00
10: R_X86_64_PC32 .LC7-0x4
14: f3 0f 2a cf cvtsi2ss %edi,%xmm1
18: f3 0f 5e c1 divss %xmm1,%xmm0
1c: 0f 28 c8 movaps %xmm0,%xmm1
1f: 0f 54 ca andps %xmm2,%xmm1
22: 0f 2e d9 ucomiss %xmm1,%xmm3
25: 76 2c jbe 53 <floordiv_float_int+0x53>
27: f3 0f 2c c0 cvttss2si %xmm0,%eax
2b: 66 0f ef c9 pxor %xmm1,%xmm1
2f: f3 0f 10 25 00 00 00 movss 0x0(%rip),%xmm4 # 37 <floordiv_float_int+0x37>
36: 00
33: R_X86_64_PC32 .LC8-0x4
37: 0f 55 d0 andnps %xmm0,%xmm2
3a: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
3e: 0f 28 d9 movaps %xmm1,%xmm3
41: f3 0f c2 d8 06 cmpnless %xmm0,%xmm3
46: 0f 54 dc andps %xmm4,%xmm3
49: f3 0f 5c cb subss %xmm3,%xmm1
4d: 0f 28 c1 movaps %xmm1,%xmm0
50: 0f 56 c2 orps %xmm2,%xmm0
53: e9 00 00 00 00 jmp 58 <.LC0>
54: R_X86_64_PLT32 result_float_int-0x4
floordiv_float_float#
void floordiv_float_float(float a, float b) {
result_float_float(floorf((float)a / (float)b), b);
}
arm64#
0000000000000000 <floordiv_float_float>:
0: 1e211800 fdiv s0, s0, s1
4: 1e254000 frintm s0, s0
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <floordiv_float_float>:
0: ee800a20 vdiv.f32 s0, s0, s1
4: e92d4010 push {r4, lr}
8: ed2d8b02 vpush {d8}
c: eeb08a60 vmov.f32 s16, s1
10: ebfffffe bl 0 <floordiv_float_float>
10: R_ARM_CALL floorf
14: eef00a48 vmov.f32 s1, s16
18: ecbd8b02 vpop {d8}
1c: e8bd4010 pop {r4, lr}
20: eafffffe b 0 <result_float_float>
20: R_ARM_JUMP24 result_float_float
armv7#
00000000 <floordiv_float_float>:
0: ee800a20 vdiv.f32 s0, s0, s1
4: e92d4010 push {r4, lr}
8: ed2d8b02 vpush {d8}
c: eeb08a60 vmov.f32 s16, s1
10: ebfffffe bl 0 <floordiv_float_float>
10: R_ARM_CALL floorf
14: eef00a48 vmov.f32 s1, s16
18: ecbd8b02 vpop {d8}
1c: e8bd4010 pop {r4, lr}
20: eafffffe b 0 <result_float_float>
20: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <floordiv_float_float>:
0: f3 0f 5e c1 divss %xmm1,%xmm0
4: f3 0f 10 1d 00 00 00 movss 0x0(%rip),%xmm3 # c <floordiv_float_float+0xc>
b: 00
8: R_X86_64_PC32 .LC9-0x4
c: f3 0f 10 25 00 00 00 movss 0x0(%rip),%xmm4 # 14 <floordiv_float_float+0x14>
13: 00
10: R_X86_64_PC32 .LC7-0x4
14: 0f 28 d0 movaps %xmm0,%xmm2
17: 0f 54 d3 andps %xmm3,%xmm2
1a: 0f 2e e2 ucomiss %xmm2,%xmm4
1d: 76 2c jbe 4b <floordiv_float_float+0x4b>
1f: f3 0f 2c c0 cvttss2si %xmm0,%eax
23: 66 0f ef d2 pxor %xmm2,%xmm2
27: f3 0f 10 2d 00 00 00 movss 0x0(%rip),%xmm5 # 2f <floordiv_float_float+0x2f>
2e: 00
2b: R_X86_64_PC32 .LC8-0x4
2f: 0f 55 d8 andnps %xmm0,%xmm3
32: f3 0f 2a d0 cvtsi2ss %eax,%xmm2
36: 0f 28 e2 movaps %xmm2,%xmm4
39: f3 0f c2 e0 06 cmpnless %xmm0,%xmm4
3e: 0f 54 e5 andps %xmm5,%xmm4
41: f3 0f 5c d4 subss %xmm4,%xmm2
45: 0f 56 d3 orps %xmm3,%xmm2
48: 0f 28 c2 movaps %xmm2,%xmm0
4b: e9 00 00 00 00 jmp 50 <.LC3>
4c: R_X86_64_PLT32 result_float_float-0x4
gt_int_int#
void gt_int_int(int arg1, int arg2) {
result_int_int(arg1 > arg2, arg2);
}
arm64#
0000000000000000 <gt_int_int>:
0: 6b01001f cmp w0, w1
4: 1a9fd7e0 cset w0, gt
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <gt_int_int>:
0: e1500001 cmp r0, r1
4: d3a00000 movle r0, #0
8: c3a00001 movgt r0, #1
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <gt_int_int>:
0: e1500001 cmp r0, r1
4: d3a00000 movle r0, #0
8: c3a00001 movgt r0, #1
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <gt_int_int>:
0: 39 f7 cmp %esi,%edi
2: 40 0f 9f c7 setg %dil
6: 40 0f b6 ff movzbl %dil,%edi
a: e9 00 00 00 00 jmp f <.LC3+0x3>
b: R_X86_64_PLT32 result_int_int-0x4
gt_int_float#
void gt_int_float(int arg1, float arg2) {
result_int_float(arg1 > arg2, arg2);
}
arm64#
0000000000000000 <gt_int_float>:
0: 1e220001 scvtf s1, w0
4: 1e202030 fcmpe s1, s0
8: 1a9fd7e0 cset w0, gt
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <gt_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47ac0 vcmpe.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: c3a00001 movgt r0, #1
14: d3a00000 movle r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
armv7#
00000000 <gt_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47ac0 vcmpe.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: c3a00001 movgt r0, #1
14: d3a00000 movle r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <gt_int_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: f3 0f 2a cf cvtsi2ss %edi,%xmm1
8: 31 ff xor %edi,%edi
a: 0f 2f c8 comiss %xmm0,%xmm1
d: 40 0f 97 c7 seta %dil
11: e9 00 00 00 00 jmp 16 <.LC8+0x2>
12: R_X86_64_PLT32 result_int_float-0x4
gt_float_int#
void gt_float_int(float arg1, int arg2) {
result_int_int(arg1 > arg2, arg2);
}
arm64#
0000000000000000 <gt_float_int>:
0: 1e220001 scvtf s1, w0
4: 2a0003e1 mov w1, w0
8: 1e202030 fcmpe s1, s0
c: 1a9f57e0 cset w0, mi // mi = first
10: 14000000 b 0 <result_int_int>
10: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <gt_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 43a00001 movmi r0, #1
18: 53a00000 movpl r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <gt_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 43a00001 movmi r0, #1
18: 53a00000 movpl r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <gt_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: 89 fe mov %edi,%esi
9: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
d: 31 ff xor %edi,%edi
f: 0f 2f c8 comiss %xmm0,%xmm1
12: 40 0f 97 c7 seta %dil
16: e9 00 00 00 00 jmp 1b <.LC0+0x3>
17: R_X86_64_PLT32 result_int_int-0x4
gt_float_float#
void gt_float_float(float arg1, float arg2) {
result_int_float(arg1 > arg2, arg2);
}
arm64#
0000000000000000 <gt_float_float>:
0: 1e212010 fcmpe s0, s1
4: 1e204020 fmov s0, s1
8: 1a9fd7e0 cset w0, gt
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <gt_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: c3a00001 movgt r0, #1
10: d3a00000 movle r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
armv7#
00000000 <gt_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: c3a00001 movgt r0, #1
10: d3a00000 movle r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <gt_float_float>:
0: 31 ff xor %edi,%edi
2: 0f 2f c1 comiss %xmm1,%xmm0
5: 0f 28 c1 movaps %xmm1,%xmm0
8: 40 0f 97 c7 seta %dil
c: e9 00 00 00 00 jmp 11 <.LC2+0x1>
d: R_X86_64_PLT32 result_int_float-0x4
ge_int_int#
void ge_int_int(int arg1, int arg2) {
result_int_int(arg1 >= arg2, arg2);
}
arm64#
0000000000000000 <ge_int_int>:
0: 6b01001f cmp w0, w1
4: 1a9fb7e0 cset w0, ge // ge = tcont
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <ge_int_int>:
0: e1500001 cmp r0, r1
4: b3a00000 movlt r0, #0
8: a3a00001 movge r0, #1
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <ge_int_int>:
0: e1500001 cmp r0, r1
4: b3a00000 movlt r0, #0
8: a3a00001 movge r0, #1
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <ge_int_int>:
0: 39 f7 cmp %esi,%edi
2: 40 0f 9d c7 setge %dil
6: 40 0f b6 ff movzbl %dil,%edi
a: e9 00 00 00 00 jmp f <.LC3+0x3>
b: R_X86_64_PLT32 result_int_int-0x4
ge_int_float#
void ge_int_float(int arg1, float arg2) {
result_int_float(arg1 >= arg2, arg2);
}
arm64#
0000000000000000 <ge_int_float>:
0: 1e220001 scvtf s1, w0
4: 1e202030 fcmpe s1, s0
8: 1a9fb7e0 cset w0, ge // ge = tcont
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <ge_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47ac0 vcmpe.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: a3a00001 movge r0, #1
14: b3a00000 movlt r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
armv7#
00000000 <ge_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47ac0 vcmpe.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: a3a00001 movge r0, #1
14: b3a00000 movlt r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <ge_int_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: f3 0f 2a cf cvtsi2ss %edi,%xmm1
8: 31 ff xor %edi,%edi
a: 0f 2f c8 comiss %xmm0,%xmm1
d: 40 0f 93 c7 setae %dil
11: e9 00 00 00 00 jmp 16 <.LC8+0x2>
12: R_X86_64_PLT32 result_int_float-0x4
ge_float_int#
void ge_float_int(float arg1, int arg2) {
result_int_int(arg1 >= arg2, arg2);
}
arm64#
0000000000000000 <ge_float_int>:
0: 1e220001 scvtf s1, w0
4: 2a0003e1 mov w1, w0
8: 1e202030 fcmpe s1, s0
c: 1a9f87e0 cset w0, ls // ls = plast
10: 14000000 b 0 <result_int_int>
10: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <ge_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 93a00001 movls r0, #1
18: 83a00000 movhi r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <ge_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47ac0 vcmpe.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 93a00001 movls r0, #1
18: 83a00000 movhi r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <ge_float_int>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: 66 0f ef c0 pxor %xmm0,%xmm0
7: 89 fe mov %edi,%esi
9: f3 0f 2a c7 cvtsi2ss %edi,%xmm0
d: 31 ff xor %edi,%edi
f: 0f 2f c8 comiss %xmm0,%xmm1
12: 40 0f 93 c7 setae %dil
16: e9 00 00 00 00 jmp 1b <.LC0+0x3>
17: R_X86_64_PLT32 result_int_int-0x4
ge_float_float#
void ge_float_float(float arg1, float arg2) {
result_int_float(arg1 >= arg2, arg2);
}
arm64#
0000000000000000 <ge_float_float>:
0: 1e212010 fcmpe s0, s1
4: 1e204020 fmov s0, s1
8: 1a9fb7e0 cset w0, ge // ge = tcont
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <ge_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: a3a00001 movge r0, #1
10: b3a00000 movlt r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
armv7#
00000000 <ge_float_float>:
0: eeb40ae0 vcmpe.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: a3a00001 movge r0, #1
10: b3a00000 movlt r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <ge_float_float>:
0: 31 ff xor %edi,%edi
2: 0f 2f c1 comiss %xmm1,%xmm0
5: 0f 28 c1 movaps %xmm1,%xmm0
8: 40 0f 93 c7 setae %dil
c: e9 00 00 00 00 jmp 11 <.LC2+0x1>
d: R_X86_64_PLT32 result_int_float-0x4
eq_int_int#
void eq_int_int(int arg1, int arg2) {
result_int_int(arg1 == arg2, arg2);
}
arm64#
0000000000000000 <eq_int_int>:
0: 6b01001f cmp w0, w1
4: 1a9f17e0 cset w0, eq // eq = none
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <eq_int_int>:
0: e0400001 sub r0, r0, r1
4: e16f0f10 clz r0, r0
8: e1a002a0 lsr r0, r0, #5
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <eq_int_int>:
0: e0400001 sub r0, r0, r1
4: e16f0f10 clz r0, r0
8: e1a002a0 lsr r0, r0, #5
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <eq_int_int>:
0: 39 f7 cmp %esi,%edi
2: 40 0f 94 c7 sete %dil
6: 40 0f b6 ff movzbl %dil,%edi
a: e9 00 00 00 00 jmp f <.LC3+0x3>
b: R_X86_64_PLT32 result_int_int-0x4
eq_int_float#
void eq_int_float(int arg1, float arg2) {
result_int_float(arg1 == arg2, arg2);
}
arm64#
0000000000000000 <eq_int_float>:
0: 1e220001 scvtf s1, w0
4: 1e202020 fcmp s1, s0
8: 1a9f17e0 cset w0, eq // eq = none
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <eq_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47a40 vcmp.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 03a00001 moveq r0, #1
14: 13a00000 movne r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
armv7#
00000000 <eq_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47a40 vcmp.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 03a00001 moveq r0, #1
14: 13a00000 movne r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <eq_int_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: b8 00 00 00 00 mov $0x0,%eax
9: f3 0f 2a cf cvtsi2ss %edi,%xmm1
d: 31 ff xor %edi,%edi
f: 0f 2e c8 ucomiss %xmm0,%xmm1
12: 40 0f 9b c7 setnp %dil
16: 0f 45 f8 cmovne %eax,%edi
19: e9 00 00 00 00 jmp 1e <.LC1+0x2>
1a: R_X86_64_PLT32 result_int_float-0x4
eq_float_int#
void eq_float_int(float arg1, int arg2) {
result_int_int(arg1 == arg2, arg2);
}
arm64#
0000000000000000 <eq_float_int>:
0: 1e220001 scvtf s1, w0
4: 2a0003e1 mov w1, w0
8: 1e202020 fcmp s1, s0
c: 1a9f17e0 cset w0, eq // eq = none
10: 14000000 b 0 <result_int_int>
10: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <eq_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47a40 vcmp.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 03a00001 moveq r0, #1
18: 13a00000 movne r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <eq_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47a40 vcmp.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 03a00001 moveq r0, #1
18: 13a00000 movne r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <eq_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 89 fe mov %edi,%esi
6: b8 00 00 00 00 mov $0x0,%eax
b: f3 0f 2a cf cvtsi2ss %edi,%xmm1
f: 31 ff xor %edi,%edi
11: 0f 2e c8 ucomiss %xmm0,%xmm1
14: 40 0f 9b c7 setnp %dil
18: 0f 45 f8 cmovne %eax,%edi
1b: e9 00 00 00 00 jmp 20 <.LC0>
1c: R_X86_64_PLT32 result_int_int-0x4
eq_float_float#
void eq_float_float(float arg1, float arg2) {
result_int_float(arg1 == arg2, arg2);
}
arm64#
0000000000000000 <eq_float_float>:
0: 1e212000 fcmp s0, s1
4: 1e204020 fmov s0, s1
8: 1a9f17e0 cset w0, eq // eq = none
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <eq_float_float>:
0: eeb40a60 vcmp.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: 03a00001 moveq r0, #1
10: 13a00000 movne r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
armv7#
00000000 <eq_float_float>:
0: eeb40a60 vcmp.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: 03a00001 moveq r0, #1
10: 13a00000 movne r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <eq_float_float>:
0: 31 ff xor %edi,%edi
2: 0f 2e c1 ucomiss %xmm1,%xmm0
5: 0f 28 c1 movaps %xmm1,%xmm0
8: b8 00 00 00 00 mov $0x0,%eax
d: 40 0f 9b c7 setnp %dil
11: 0f 45 f8 cmovne %eax,%edi
14: e9 00 00 00 00 jmp 19 <.LC0+0x1>
15: R_X86_64_PLT32 result_int_float-0x4
ne_int_int#
void ne_int_int(int arg1, int arg2) {
result_int_int(arg1 != arg2, arg2);
}
arm64#
0000000000000000 <ne_int_int>:
0: 6b01001f cmp w0, w1
4: 1a9f07e0 cset w0, ne // ne = any
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <ne_int_int>:
0: e0500001 subs r0, r0, r1
4: 13a00001 movne r0, #1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
armv7#
00000000 <ne_int_int>:
0: e0500001 subs r0, r0, r1
4: 13a00001 movne r0, #1
8: eafffffe b 0 <result_int_int>
8: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <ne_int_int>:
0: 39 f7 cmp %esi,%edi
2: 40 0f 95 c7 setne %dil
6: 40 0f b6 ff movzbl %dil,%edi
a: e9 00 00 00 00 jmp f <.LC3+0x3>
b: R_X86_64_PLT32 result_int_int-0x4
ne_int_float#
void ne_int_float(int arg1, float arg2) {
result_int_float(arg1 != arg2, arg2);
}
arm64#
0000000000000000 <ne_int_float>:
0: 1e220001 scvtf s1, w0
4: 1e202020 fcmp s1, s0
8: 1a9f07e0 cset w0, ne // ne = any
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <ne_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47a40 vcmp.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 13a00001 movne r0, #1
14: 03a00000 moveq r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
armv7#
00000000 <ne_int_float>:
0: ee070a90 vmov s15, r0
4: eef87ae7 vcvt.f32.s32 s15, s15
8: eef47a40 vcmp.f32 s15, s0
c: eef1fa10 vmrs APSR_nzcv, fpscr
10: 13a00001 movne r0, #1
14: 03a00000 moveq r0, #0
18: eafffffe b 0 <result_int_float>
18: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <ne_int_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: b8 01 00 00 00 mov $0x1,%eax
9: f3 0f 2a cf cvtsi2ss %edi,%xmm1
d: 31 ff xor %edi,%edi
f: 0f 2e c8 ucomiss %xmm0,%xmm1
12: 40 0f 9a c7 setp %dil
16: 0f 45 f8 cmovne %eax,%edi
19: e9 00 00 00 00 jmp 1e <.LC1+0x2>
1a: R_X86_64_PLT32 result_int_float-0x4
ne_float_int#
void ne_float_int(float arg1, int arg2) {
result_int_int(arg1 != arg2, arg2);
}
arm64#
0000000000000000 <ne_float_int>:
0: 1e220001 scvtf s1, w0
4: 2a0003e1 mov w1, w0
8: 1e202020 fcmp s1, s0
c: 1a9f07e0 cset w0, ne // ne = any
10: 14000000 b 0 <result_int_int>
10: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <ne_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47a40 vcmp.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 13a00001 movne r0, #1
18: 03a00000 moveq r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <ne_float_int>:
0: ee070a90 vmov s15, r0
4: e1a01000 mov r1, r0
8: eef87ae7 vcvt.f32.s32 s15, s15
c: eef47a40 vcmp.f32 s15, s0
10: eef1fa10 vmrs APSR_nzcv, fpscr
14: 13a00001 movne r0, #1
18: 03a00000 moveq r0, #0
1c: eafffffe b 0 <result_int_int>
1c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <ne_float_int>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 89 fe mov %edi,%esi
6: b8 01 00 00 00 mov $0x1,%eax
b: f3 0f 2a cf cvtsi2ss %edi,%xmm1
f: 31 ff xor %edi,%edi
11: 0f 2e c8 ucomiss %xmm0,%xmm1
14: 40 0f 9a c7 setp %dil
18: 0f 45 f8 cmovne %eax,%edi
1b: e9 00 00 00 00 jmp 20 <.LC0>
1c: R_X86_64_PLT32 result_int_int-0x4
ne_float_float#
void ne_float_float(float arg1, float arg2) {
result_int_float(arg1 != arg2, arg2);
}
arm64#
0000000000000000 <ne_float_float>:
0: 1e212000 fcmp s0, s1
4: 1e204020 fmov s0, s1
8: 1a9f07e0 cset w0, ne // ne = any
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <ne_float_float>:
0: eeb40a60 vcmp.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: 13a00001 movne r0, #1
10: 03a00000 moveq r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
armv7#
00000000 <ne_float_float>:
0: eeb40a60 vcmp.f32 s0, s1
4: eeb00a60 vmov.f32 s0, s1
8: eef1fa10 vmrs APSR_nzcv, fpscr
c: 13a00001 movne r0, #1
10: 03a00000 moveq r0, #0
14: eafffffe b 0 <result_int_float>
14: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <ne_float_float>:
0: 31 ff xor %edi,%edi
2: 0f 2e c1 ucomiss %xmm1,%xmm0
5: 0f 28 c1 movaps %xmm1,%xmm0
8: b8 01 00 00 00 mov $0x1,%eax
d: 40 0f 9a c7 setp %dil
11: 0f 45 f8 cmovne %eax,%edi
14: e9 00 00 00 00 jmp 19 <.LC0+0x1>
15: R_X86_64_PLT32 result_int_float-0x4
bwand_int_int#
void bwand_int_int(int arg1, int arg2) {
result_int_int(arg1 & arg2, arg2);
}
arm64#
0000000000000000 <bwand_int_int>:
0: 0a010000 and w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <bwand_int_int>:
0: e0000001 and r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <bwand_int_int>:
0: e0000001 and r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <bwand_int_int>:
0: 21 f7 and %esi,%edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int_int-0x4
bwor_int_int#
void bwor_int_int(int arg1, int arg2) {
result_int_int(arg1 | arg2, arg2);
}
arm64#
0000000000000000 <bwor_int_int>:
0: 2a010000 orr w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <bwor_int_int>:
0: e1800001 orr r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <bwor_int_int>:
0: e1800001 orr r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <bwor_int_int>:
0: 09 f7 or %esi,%edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int_int-0x4
bwxor_int_int#
void bwxor_int_int(int arg1, int arg2) {
result_int_int(arg1 ^ arg2, arg2);
}
arm64#
0000000000000000 <bwxor_int_int>:
0: 4a010000 eor w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <bwxor_int_int>:
0: e0200001 eor r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <bwxor_int_int>:
0: e0200001 eor r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <bwxor_int_int>:
0: 31 f7 xor %esi,%edi
2: e9 00 00 00 00 jmp 7 <.LC1+0x3>
3: R_X86_64_PLT32 result_int_int-0x4
lshift_int_int#
void lshift_int_int(int arg1, int arg2) {
result_int_int(arg1 << arg2, arg2);
}
arm64#
0000000000000000 <lshift_int_int>:
0: 1ac12000 lsl w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <lshift_int_int>:
0: e1a00110 lsl r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <lshift_int_int>:
0: e1a00110 lsl r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <lshift_int_int>:
0: 89 f1 mov %esi,%ecx
2: d3 e7 shl %cl,%edi
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_int_int-0x4
rshift_int_int#
void rshift_int_int(int arg1, int arg2) {
result_int_int(arg1 >> arg2, arg2);
}
arm64#
0000000000000000 <rshift_int_int>:
0: 1ac12800 asr w0, w0, w1
4: 14000000 b 0 <result_int_int>
4: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <rshift_int_int>:
0: e1a00150 asr r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
armv7#
00000000 <rshift_int_int>:
0: e1a00150 asr r0, r0, r1
4: eafffffe b 0 <result_int_int>
4: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <rshift_int_int>:
0: 89 f1 mov %esi,%ecx
2: d3 ff sar %cl,%edi
4: e9 00 00 00 00 jmp 9 <.LC1+0x1>
5: R_X86_64_PLT32 result_int_int-0x4
mod_int_int#
void mod_int_int(int arg1, int arg2) {
result_int_int(arg1 % arg2, arg2);
}
arm64#
0000000000000000 <mod_int_int>:
0: 1ac10c02 sdiv w2, w0, w1
4: 1b018040 msub w0, w2, w1, w0
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <mod_int_int>:
0: e92d4010 push {r4, lr}
4: e1a04001 mov r4, r1
8: ebfffffe bl 128 <__aeabi_idivmod>
8: R_ARM_CALL __aeabi_idivmod
c: e1a00001 mov r0, r1
10: e1a01004 mov r1, r4
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_int_int>
18: R_ARM_JUMP24 result_int_int
armv7#
00000000 <mod_int_int>:
0: e92d4010 push {r4, lr}
4: e1a04001 mov r4, r1
8: ebfffffe bl 128 <__aeabi_idivmod>
8: R_ARM_CALL __aeabi_idivmod
c: e1a00001 mov r0, r1
10: e1a01004 mov r1, r4
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_int_int>
18: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <mod_int_int>:
0: 89 f8 mov %edi,%eax
2: 99 cltd
3: f7 fe idiv %esi
5: 89 d7 mov %edx,%edi
7: e9 00 00 00 00 jmp c <.LC3>
8: R_X86_64_PLT32 result_int_int-0x4
load_int_reg0_int_int#
void load_int_reg0_int_int(int arg1, int arg2) {
result_int_int(dummy_int, arg2);
}
arm64#
0000000000000000 <load_int_reg0_int_int>:
0: 90000000 adrp x0, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400000 ldr w0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <load_int_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <load_int_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <load_int_reg0_int_int>:
0: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 6 <load_int_reg0_int_int+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_int-0x4
load_int_reg1_int_int#
void load_int_reg1_int_int(int arg1, int arg2) {
result_int_int(arg1, dummy_int);
}
arm64#
0000000000000000 <load_int_reg1_int_int>:
0: 90000001 adrp x1, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400021 ldr w1, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <load_int_reg1_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5931000 ldr r1, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <load_int_reg1_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5931000 ldr r1, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <load_int_reg1_int_int>:
0: 8b 35 00 00 00 00 mov 0x0(%rip),%esi # 6 <load_int_reg1_int_int+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_int-0x4
load_float_reg0_int_int#
void load_float_reg0_int_int(int arg1, int arg2) {
result_float_int(dummy_float, arg2);
}
arm64#
0000000000000000 <load_float_reg0_int_int>:
0: 90000002 adrp x2, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: 2a0103e0 mov w0, w1
8: bd400040 ldr s0, [x2]
8: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
c: 14000000 b 0 <result_float_int>
c: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <load_float_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: e1a00001 mov r0, r1
c: ed930a00 vldr s0, [r3]
10: eafffffe b 0 <result_float_int>
10: R_ARM_JUMP24 result_float_int
armv7#
00000000 <load_float_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: e1a00001 mov r0, r1
c: ed930a00 vldr s0, [r3]
10: eafffffe b 0 <result_float_int>
10: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <load_float_reg0_int_int>:
0: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # 8 <load_float_reg0_int_int+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: 89 f7 mov %esi,%edi
a: e9 00 00 00 00 jmp f <.LC3+0x3>
b: R_X86_64_PLT32 result_float_int-0x4
load_float_reg1_int_int#
void load_float_reg1_int_int(int arg1, int arg2) {
result_int_float(arg1, dummy_float);
}
arm64#
0000000000000000 <load_float_reg1_int_int>:
0: 90000001 adrp x1, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400020 ldr s0, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_int_float>
8: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <load_float_reg1_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
armv7#
00000000 <load_float_reg1_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <load_float_reg1_int_int>:
0: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # 8 <load_float_reg1_int_int+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_int_float-0x4
load_int_reg0_int_float#
void load_int_reg0_int_float(int arg1, float arg2) {
result_int_float(dummy_int, arg2);
}
arm64#
0000000000000000 <load_int_reg0_int_float>:
0: 90000000 adrp x0, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400000 ldr w0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_float>
8: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <load_int_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
armv7#
00000000 <load_int_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <load_int_reg0_int_float>:
0: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 6 <load_int_reg0_int_float+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_float-0x4
load_int_reg1_int_float#
void load_int_reg1_int_float(int arg1, float arg2) {
result_int_int(arg1, dummy_int);
}
arm64#
0000000000000000 <load_int_reg1_int_float>:
0: 90000001 adrp x1, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400021 ldr w1, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <load_int_reg1_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5931000 ldr r1, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <load_int_reg1_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5931000 ldr r1, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <load_int_reg1_int_float>:
0: 8b 35 00 00 00 00 mov 0x0(%rip),%esi # 6 <load_int_reg1_int_float+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_int-0x4
load_float_reg0_int_float#
void load_float_reg0_int_float(int arg1, float arg2) {
result_float_float(dummy_float, arg2);
}
arm64#
0000000000000000 <load_float_reg0_int_float>:
0: 90000000 adrp x0, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: 1e204001 fmov s1, s0
8: bd400000 ldr s0, [x0]
8: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
c: 14000000 b 0 <result_float_float>
c: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <load_float_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: eef00a40 vmov.f32 s1, s0
c: ed930a00 vldr s0, [r3]
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
armv7#
00000000 <load_float_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: eef00a40 vmov.f32 s1, s0
c: ed930a00 vldr s0, [r3]
10: eafffffe b 0 <result_float_float>
10: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <load_float_reg0_int_float>:
0: 0f 28 c8 movaps %xmm0,%xmm1
3: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # b <load_float_reg0_int_float+0xb>
a: 00
7: R_X86_64_PC32 dummy_float-0x4
b: e9 00 00 00 00 jmp 10 <.LC2>
c: R_X86_64_PLT32 result_float_float-0x4
load_float_reg1_int_float#
void load_float_reg1_int_float(int arg1, float arg2) {
result_int_float(arg1, dummy_float);
}
arm64#
0000000000000000 <load_float_reg1_int_float>:
0: 90000001 adrp x1, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400020 ldr s0, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_int_float>
8: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <load_float_reg1_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
armv7#
00000000 <load_float_reg1_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <load_float_reg1_int_float>:
0: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # 8 <load_float_reg1_int_float+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_int_float-0x4
load_int_reg0_float_int#
void load_int_reg0_float_int(float arg1, int arg2) {
result_int_int(dummy_int, arg2);
}
arm64#
0000000000000000 <load_int_reg0_float_int>:
0: 90000002 adrp x2, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: 2a0003e1 mov w1, w0
8: b9400040 ldr w0, [x2]
8: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
c: 14000000 b 0 <result_int_int>
c: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <load_int_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e1a01000 mov r1, r0
c: e5930000 ldr r0, [r3]
10: eafffffe b 0 <result_int_int>
10: R_ARM_JUMP24 result_int_int
armv7#
00000000 <load_int_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e1a01000 mov r1, r0
c: e5930000 ldr r0, [r3]
10: eafffffe b 0 <result_int_int>
10: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <load_int_reg0_float_int>:
0: 89 fe mov %edi,%esi
2: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 8 <load_int_reg0_float_int+0x8>
4: R_X86_64_PC32 dummy_int-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_int_int-0x4
load_int_reg1_float_int#
void load_int_reg1_float_int(float arg1, int arg2) {
result_float_int(arg1, dummy_int);
}
arm64#
0000000000000000 <load_int_reg1_float_int>:
0: 90000000 adrp x0, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400000 ldr w0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <load_int_reg1_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <load_int_reg1_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <load_int_reg1_float_int>:
0: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 6 <load_int_reg1_float_int+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_float_int-0x4
load_float_reg0_float_int#
void load_float_reg0_float_int(float arg1, int arg2) {
result_float_int(dummy_float, arg2);
}
arm64#
0000000000000000 <load_float_reg0_float_int>:
0: 90000001 adrp x1, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400020 ldr s0, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <load_float_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <load_float_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <load_float_reg0_float_int>:
0: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # 8 <load_float_reg0_float_int+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_int-0x4
load_float_reg1_float_int#
void load_float_reg1_float_int(float arg1, int arg2) {
result_float_float(arg1, dummy_float);
}
arm64#
0000000000000000 <load_float_reg1_float_int>:
0: 90000000 adrp x0, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400001 ldr s1, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <load_float_reg1_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: edd30a00 vldr s1, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <load_float_reg1_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: edd30a00 vldr s1, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <load_float_reg1_float_int>:
0: f3 0f 10 0d 00 00 00 movss 0x0(%rip),%xmm1 # 8 <load_float_reg1_float_int+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_float-0x4
load_int_reg0_float_float#
void load_int_reg0_float_float(float arg1, float arg2) {
result_int_float(dummy_int, arg2);
}
arm64#
0000000000000000 <load_int_reg0_float_float>:
0: 90000000 adrp x0, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: 1e204020 fmov s0, s1
8: b9400000 ldr w0, [x0]
8: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
c: 14000000 b 0 <result_int_float>
c: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <load_int_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: eeb00a60 vmov.f32 s0, s1
c: e5930000 ldr r0, [r3]
10: eafffffe b 0 <result_int_float>
10: R_ARM_JUMP24 result_int_float
armv7#
00000000 <load_int_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: eeb00a60 vmov.f32 s0, s1
c: e5930000 ldr r0, [r3]
10: eafffffe b 0 <result_int_float>
10: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <load_int_reg0_float_float>:
0: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 6 <load_int_reg0_float_float+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: 0f 28 c1 movaps %xmm1,%xmm0
9: e9 00 00 00 00 jmp e <.LC3+0x2>
a: R_X86_64_PLT32 result_int_float-0x4
load_int_reg1_float_float#
void load_int_reg1_float_float(float arg1, float arg2) {
result_float_int(arg1, dummy_int);
}
arm64#
0000000000000000 <load_int_reg1_float_float>:
0: 90000000 adrp x0, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9400000 ldr w0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <load_int_reg1_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <load_int_reg1_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5930000 ldr r0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <load_int_reg1_float_float>:
0: 8b 3d 00 00 00 00 mov 0x0(%rip),%edi # 6 <load_int_reg1_float_float+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_float_int-0x4
load_float_reg0_float_float#
void load_float_reg0_float_float(float arg1, float arg2) {
result_float_float(dummy_float, arg2);
}
arm64#
0000000000000000 <load_float_reg0_float_float>:
0: 90000000 adrp x0, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400000 ldr s0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <load_float_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <load_float_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed930a00 vldr s0, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <load_float_reg0_float_float>:
0: f3 0f 10 05 00 00 00 movss 0x0(%rip),%xmm0 # 8 <load_float_reg0_float_float+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_float-0x4
load_float_reg1_float_float#
void load_float_reg1_float_float(float arg1, float arg2) {
result_float_float(arg1, dummy_float);
}
arm64#
0000000000000000 <load_float_reg1_float_float>:
0: 90000000 adrp x0, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd400001 ldr s1, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <load_float_reg1_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: edd30a00 vldr s1, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <load_float_reg1_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: edd30a00 vldr s1, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <load_float_reg1_float_float>:
0: f3 0f 10 0d 00 00 00 movss 0x0(%rip),%xmm1 # 8 <load_float_reg1_float_float+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_float-0x4
store_int_reg0_int_int#
void store_int_reg0_int_int(int arg1, int arg2) {
dummy_int = arg1;
result_int_int(arg1, arg2);
}
arm64#
0000000000000000 <store_int_reg0_int_int>:
0: 90000003 adrp x3, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9000060 str w0, [x3]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_int>
8: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <store_int_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5830000 str r0, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
armv7#
00000000 <store_int_reg0_int_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5830000 str r0, [r3]
c: eafffffe b 0 <result_int_int>
c: R_ARM_JUMP24 result_int_int
x86_64#
0000000000000000 <store_int_reg0_int_int>:
0: 89 3d 00 00 00 00 mov %edi,0x0(%rip) # 6 <store_int_reg0_int_int+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_int-0x4
store_int_reg0_int_float#
void store_int_reg0_int_float(int arg1, float arg2) {
dummy_int = arg1;
result_int_float(arg1, arg2);
}
arm64#
0000000000000000 <store_int_reg0_int_float>:
0: 90000002 adrp x2, 0 <dummy_int>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_int
4: b9000040 str w0, [x2]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_int
8: 14000000 b 0 <result_int_float>
8: R_AARCH64_JUMP26 result_int_float
armv6#
00000000 <store_int_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5830000 str r0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
armv7#
00000000 <store_int_reg0_int_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_int
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_int
8: e5830000 str r0, [r3]
c: eafffffe b 0 <result_int_float>
c: R_ARM_JUMP24 result_int_float
x86_64#
0000000000000000 <store_int_reg0_int_float>:
0: 89 3d 00 00 00 00 mov %edi,0x0(%rip) # 6 <store_int_reg0_int_float+0x6>
2: R_X86_64_PC32 dummy_int-0x4
6: e9 00 00 00 00 jmp b <.LC1+0x3>
7: R_X86_64_PLT32 result_int_float-0x4
store_float_reg0_float_int#
void store_float_reg0_float_int(float arg1, int arg2) {
dummy_float = arg1;
result_float_int(arg1, arg2);
}
arm64#
0000000000000000 <store_float_reg0_float_int>:
0: 90000001 adrp x1, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd000020 str s0, [x1]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_int>
8: R_AARCH64_JUMP26 result_float_int
armv6#
00000000 <store_float_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed830a00 vstr s0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
armv7#
00000000 <store_float_reg0_float_int>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed830a00 vstr s0, [r3]
c: eafffffe b 0 <result_float_int>
c: R_ARM_JUMP24 result_float_int
x86_64#
0000000000000000 <store_float_reg0_float_int>:
0: f3 0f 11 05 00 00 00 movss %xmm0,0x0(%rip) # 8 <store_float_reg0_float_int+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_int-0x4
store_float_reg0_float_float#
void store_float_reg0_float_float(float arg1, float arg2) {
dummy_float = arg1;
result_float_float(arg1, arg2);
}
arm64#
0000000000000000 <store_float_reg0_float_float>:
0: 90000000 adrp x0, 0 <dummy_float>
0: R_AARCH64_ADR_PREL_PG_HI21 dummy_float
4: bd000000 str s0, [x0]
4: R_AARCH64_LDST32_ABS_LO12_NC dummy_float
8: 14000000 b 0 <result_float_float>
8: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <store_float_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed830a00 vstr s0, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <store_float_reg0_float_float>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC dummy_float
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS dummy_float
8: ed830a00 vstr s0, [r3]
c: eafffffe b 0 <result_float_float>
c: R_ARM_JUMP24 result_float_float
x86_64#
0000000000000000 <store_float_reg0_float_float>:
0: f3 0f 11 05 00 00 00 movss %xmm0,0x0(%rip) # 8 <store_float_reg0_float_float+0x8>
7: 00
4: R_X86_64_PC32 dummy_float-0x4
8: e9 00 00 00 00 jmp d <.LC3+0x1>
9: R_X86_64_PLT32 result_float_float-0x4